发明名称 REDUNDANT DECODING CIRCUIT AND ITS CONTROL METHOD
摘要 PROBLEM TO BE SOLVED: To reduce power consumption at the time of stand-by by providing a comparator, driving circuit, a pulse generator, and the like, and inactivating a nonselect signal automatically after burst read/write operation thereby controlling a current circuit leading to redundant decoding. SOLUTION: A pulse signal CYC4B from a pulse generator 20 in a redundant decoding circuit 200 has a low level at the time of starting normal read/write operation and goes high level at the end of normal read/write operation. The pulse signal CYC4B is activated to low state only during normal read/write operation and inactivated automatically upon elapsing a sufficiently long time for executing the read/write operation. The pulse signal CYC4B is inactivated when a semiconductor memory having the redundant decoding circuit 200 makes a transition to stop mode. Consequently, generation of current path is prevented surely in stop mode.
申请公布号 JP2000048593(A) 申请公布日期 2000.02.18
申请号 JP19990218995 申请日期 1999.08.02
申请人 SAMSUNG ELECTRONICS CO LTD 发明人 KYO DAKIN
分类号 G11C29/04;G11C29/00;(IPC1-7):G11C29/00 主分类号 G11C29/04
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