Dynamic semiconductor memory (DRAM) with low current consumption operational mode with capacitor for information storage has first memory field with two memory cells and a first bit line, transmitting data to and from the two memory cells

摘要

The DRAM has a first memory field with two memory cells and a first bit line, transmitting data to and from the two memory cells. There are two word lines for selecting each a respective memory cell. A cell selection circuit (26) activates the two cell selection word lines according to an address signal. The cell selection circuit constitutes a line decoding circuit for selection of the first or second memory cell, corresponding to the address signal in a first mode and for such selection, corresponding to an address signal for the first memory cell in a second mode.