| 摘要 |
PROBLEM TO BE SOLVED: To set the frequency of a data transfer clock of an external device regardless of the operation frequency of a processor. SOLUTION: This serial interface 180 is provided with a transmission data buffer 110 and a receiving data buffer 130 with which a processor 100 inputs and outputs data and a shift register 120 at a middle position of data transfer between the buffers 110 and 130 and an external device. Data writing and reading performed by the processor 100 to/from the buffers 110 and 130 are performed in synchronism with an operation clock signal 103 having a 1st frequency in which the processor 100 operates and data transmission by the register 120 to the external device 190 and data reception by the register 120 from the device 190 are performed in synchronism with a transfer clock signal 195 having a 2nd frequency that is different from the 1st frequency that is outputted by the device 190.
|
