| 摘要 |
PURPOSE: A D flip-flop is provided to reduce the lay out size, and to reduce the power consumption by reducing the numbers of gates. CONSTITUTION: The D flip-flop contains; a first transmission gate(TG11) to accept an outside input data when an outer clock signal shifts to a low level; a second transmission gate(TG13) to be transmitted a data from the first transmission circuit when the clock signal shifts to a high level; a first latch circuit(10) to latch the data when the clock signal shifts to the low level; a second latch circuit(20) to accept the outer input data through the first transmission gate when the clock signal shifts to the low level, and to latch the outer input data when the clock signal to the high level.
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