发明名称 Circuit arrangement for personal computer with several graphics processor for reduction of electromagnetic field interference between screens
摘要 The circuit arrangement is such that each graphic processor has a clock, and a genlock input or output. The clock inputs of all the graphic processors are connected to a common oscillator, or have individual oscillators with one of the graphic processors arranged as a master. The master uses its genlock signal as a controller genlock input to the remaining slave processors. An Independent claim is made for a personal computer (PC) with several graphic processors for simultaneous control of more than one monitor, where the master graphics card has a clock input from a reference oscillator, with the remaining slave graphics cards clocked via a voltage controlled oscillator in a phase lock loop (PLL) circuit.
申请公布号 DE19935700(A1) 申请公布日期 2000.02.03
申请号 DE19991035700 申请日期 1999.07.29
申请人 ELSA AG 发明人 WIENINGER, PETER
分类号 G06F3/14;G09G5/12;(IPC1-7):G09G1/00;H04N5/262 主分类号 G06F3/14
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