发明名称 METHOD AND CIRCUIT FOR IMPEDANCE MATCHING
摘要 PROBLEM TO BE SOLVED: To match impedance with an optimum value in different frequency bands. SOLUTION: A 1st reactance circuit 10a with reactance X1 and a 2nd reactance circuit 20a with reactance X2 are provided. The 1st reactance circuit 10a consists of a parallel resonance circuit, consisting of a coil 12 and a capacitor 13 and a coil 11 connected in series with it. The 2nd reactance circuit 20a consists of a parallel resonance circuit, consisting of a coil 22 and a capacitor 23 and a coil 21 connected in series with it. The reactance circuits 10a and 20a have frequency characteristics which impart specific reactance values at 2 or more differing frequencies.
申请公布号 JP2000036721(A) 申请公布日期 2000.02.02
申请号 JP19990130834 申请日期 1999.05.12
申请人 NEC CORP 发明人 OGORO KAZUO
分类号 H03H7/38;H03F3/191;(IPC1-7):H03H7/38 主分类号 H03H7/38
代理机构 代理人
主权项
地址