发明名称 |
Circuit structure comprising a parasitic transistor having a very high threshold voltage |
摘要 |
A circuit structure integrated in a semiconductor substrate (40) comprises at least one pair of transistors (20,21) being formed each in a respective active area region (30) and having a source region (22) and a drain region (23), as well as a channel region (24) intervening between the source and drain regions (22,23) and being overlaid by a gate region (25); the gate regions (25) are connected electrically together by an overlying conductive layer (28) and respective contacts (14) wherein the contacts (14) between the gate regions (24) and the conductive layer (28) are formed above the active areas (30). <IMAGE> |
申请公布号 |
EP0977265(A1) |
申请公布日期 |
2000.02.02 |
申请号 |
EP19980830461 |
申请日期 |
1998.07.30 |
申请人 |
STMICROELECTRONICS S.R.L. |
发明人 |
DALLA LIBERA, GIOVANNA;PIO, FEDERICO |
分类号 |
H01L21/8234;H01L27/088 |
主分类号 |
H01L21/8234 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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