发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To stably generate voltage for pre-charging a bit line and voltage of a cell plate node of a cell capacitor, even when power source voltage is low, in a semiconductor integrated circuit for generating the prescribed output voltage. SOLUTION: This circuit is provided with first and second operational amplifiers 1, 2 detecting the difference between voltage applied to an input terminal and the reference voltage, and first and second transistors 3, 4 performing on-off operation in accordance with a level of voltage outputted from these operational amplifiers. The first operational amplifier 1 receives output voltage at an input terminal, when a voltage level of output voltage becomes lower than the reference voltage, the amplifier 1 makes the first transistor 3 operate and elevate a voltage level of output voltage, when a voltage level of output voltage becomes higher than the reference voltage, the second operational amplifier 2 makes the second transistor 4 operate and controls so that a voltage level of output voltage is dropped.
申请公布号 JP2000030450(A) 申请公布日期 2000.01.28
申请号 JP19990092781 申请日期 1999.03.31
申请人 FUJITSU LTD 发明人 ETO SATOSHI;MATSUMIYA MASATO;TAKITA MASAHITO;NAKAMURA TOSHIKAZU;KITAMOTO AYAKO;KAWABATA KUNINORI;KANO HIDEKI;HASEGAWA MASATOMO;KOGA TORU;ISHII YUKI
分类号 G11C11/409;G05F3/16;G05F3/24;G11C11/407;H01L27/10;(IPC1-7):G11C11/407 主分类号 G11C11/409
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