DISTRIBUTED INSTRUCTION COMPLETION LOGIC

摘要

PURPOSE: A distributed instruction completion logic is provided to improve a performance of a processor by completing more instructions every period. CONSTITUTION: The processor comprises an instruction unit(116); a plurality of execution units; a plurality of completion tables(140); a central completion table(132); a unit for dispatching an instruction to one of the execution units in response to a reception of a command signal for dispatching the instruction; a unit for recording a status of the instruction to one of the completion tables(140) related to one of the execution units; a unit for recording the status of the instruction to the central completion table(132); and a unit for transmitting an instruction completion signal to one of the completion tables associated with one of the execution units.