| 摘要 |
PURPOSE: A selective silicide layer fabricating method of a self align fashion by a chemical mechanical polishing is provided to prevent a misalign by performing a whole silicide formation process after exposing a gate electrode of a region to form a silicide by a chemical mechanical polishing fashion. CONSTITUTION: The selective silicide layer fabricating method of a semiconductor memory device which includes a first region for forming a silicide layer only on a gate electrode(104) and a second region for forming a silicide layer on a gate electrode(104), a drain region(140') and a source region(104), the method comprises the steps of: forming a gate electrode, on whose sidewalls gate spacers(106) are formed, on a semiconductor substrate, on which an isolation region is defined; depositing a polishing stopper(108) of a predetermined thickness on an entire surface of the resultant structure; forming an oxide layer(110) of a predetermined thickness on the polishing stopper; performing a chemical mechanical polishing against the oxide layer until the polishing stopper is exposed; removing the oxide layer(110) of the second region; removing the polishing stopper(108) both exposed on an upper plane of the gate electrode of the first region and on an entire surface of the second region; depositing a metal layer for a formation of a first silicide layer(114) on the resultant structure; and annealing the semiconductor substrate, on which the metal layer is deposited, to form the first silicide layer(114).
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