发明名称 NONVOLATILE SEMICONDUCTOR MEMORY APPARATUS
摘要 <p>PROBLEM TO BE SOLVED: To shorten a total time required in an erase mode by changing a pulse width of erase pulses in the erase mode of a memory cell in accordance with the lapse of time, not making the pulse width constant. SOLUTION: When a verify circuit 5 judges that an erasure is not sufficient, a signal showing a difference of a threshold value from a target value is sent to an erase pulse width-setting circuit 6. The erase pulse width-setting circuit 6 calculates an erase pulse width to make constant a change amount of the threshold value of a memory cell and supplies the calculation result to an erase pulse width control circuit 2. The verify circuit 5 stops the operation of the erase pulse width-setting circuit 6 when the read threshold value of the memory cell is equal to or smaller than the target value, thereby terminating the erasure. At the same time, a total pulse width memory circuit 10 stores a total pulse width which is a sum of pulse widths of erase pulses fed to the memory cell to be erased.</p>
申请公布号 JP2000021181(A) 申请公布日期 2000.01.21
申请号 JP19980184140 申请日期 1998.06.30
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HONNA KOICHI
分类号 G11C16/02;(IPC1-7):G11C16/02 主分类号 G11C16/02
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