发明名称 CLOCK BOOSTER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To set boosting time to be constant irrespective of the fluctuation of power voltage. SOLUTION: A D-type flip flop 81 outputting the two frequency dividing signal of a basic clock from an output terminal Q when a basic clock IN is inputted to a terminal CLK, inverters 82 and 83 inverting the frequency dividing clock, low threshold N-type MOSFET 84 to which the output of the inverter 83 is applied and to whose base terminal reference voltage is applied to a capacity element 85 connected to MOSFET, a transistor couple to which N-type MOSFET 87 and P-type MOSFET 86 are connected so that they execute an inverter operation, an inverter 88 inverting the basic clock and a NAND circuit 89 which NAND-operates the output signal of the inverter 83 and the output signal of the inverter 88 are provided. The output of the NAND circuit 89 is supplied to the base of the transistors 86 and 87.
申请公布号 JP2000013197(A) 申请公布日期 2000.01.14
申请号 JP19980171557 申请日期 1998.06.18
申请人 ASAHI KASEI MICROSYSTEMS KK 发明人 TAKEHARA SATOSHI
分类号 H03K5/02;(IPC1-7):H03K5/02 主分类号 H03K5/02
代理机构 代理人
主权项
地址