发明名称 |
Wire bond packages for semiconductor chips and related assemblies |
摘要 |
A package for a semiconductor chip including a plurality of input/output pads includes an insulating layer and a plurality of conductive traces. The insulating layer has a first surface for bonding with the surface of the semiconductor chip so that the input/output pads are exposed adjacent the insulating layer. The conductive traces are provided on a second surface of the insulating layer opposite the first surface wherein each of the conductive traces corresponds to a respective one of the input/output pads. In particular, the conductive traces are adapted to receive a plurality of bonding wires each of which corresponds to a respective one of the input/output pads. Accordingly, each of the bonding wires can be bonded at a first end to the respective input/output pad and at a second end to the respective conductive trace. Furthermore, the input/output pads can be on an interior portion of the surface of the semiconductor chip, and the insulating layer can have an opening therein for exposing the input/output pads. Accordingly, a dam on the second surface of the insulating layer can be provided around the opening wherein each of the conductive traces extends from adjacent the opening under the dam to a portion of the insulating layer outside the dam. Related methods and assemblies are also discussed.
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申请公布号 |
US6013946(A) |
申请公布日期 |
2000.01.11 |
申请号 |
US19970831465 |
申请日期 |
1997.03.31 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
LEE, KYU JIN;JEONG, DO SOO;KIM, JAE JUNE |
分类号 |
H01L23/28;H01L21/50;H01L23/02;H01L23/04;H01L23/10;H01L23/12;H01L23/13;H01L23/24;(IPC1-7):H01L23/06;H01L23/495 |
主分类号 |
H01L23/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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