发明名称 Providing test vectors with pattern chaining definition
摘要 Apparatus and methods providing pattern chaining and looping in a circuit tester. The tester has a pattern data memory for storing multiple patterns and for storing a pattern chaining definition. Each pattern has pattern data for one or more test vectors. The pattern chaining definition specifies (i) a sequential order for the patterns and (ii) a location in the pattern data memory of each of the patterns. When the tester executes a functional test, the pattern chaining definition is read from the pattern data memory and used to locate each of the patterns, and the pattern data of each pattern is read to provide a test vector for each test period of the functional test. In another aspect, both a pattern program including one or more test vectors and a loop definition are stored in the pattern data memory. The pattern program defines an ordering for the test vectors, and the loop definition specifies a loop of test vectors. When the tester executes a functional test that includes the loop, the test vectors of the loop are read an indefinite number of times until a loop ending condition occurs. The first loop test vector of the loop need not be the initial test vector of the pattern program. In another aspect, the tester has chaining control registers including a start address register for pointing to a pattern chaining definition stored in the pattern data memory and a current pattern pointer register for pointing to a current pattern stored in the pattern data memory; a pattern data output sequencer; and a pattern data buffer memory coupled between the pattern data memory and the pattern data output sequencer.
申请公布号 US6014764(A) 申请公布日期 2000.01.11
申请号 US19970858992 申请日期 1997.05.20
申请人 SCHLUMBERGER TECHNOLOGIES INC. 发明人 GRAEVE, EGBERT;WEST, BURNELL G.;CHEW, TECK CHIAU
分类号 G01R31/3183;G01R31/319;G06F11/22;(IPC1-7):G01R31/28 主分类号 G01R31/3183
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