SRAM cell with p-channel pull-up sources connected to bit lines

摘要

A static random access memory cell comprising a storage latch having a first upper power supply voltage connection to a first bit line, a second upper power supply voltage connection to a second bit line, and a connection to a lower power supply voltage. A first access circuit connects the storage latch to the first bit line and a second access circuit connects the storage latch to the second bit line, wherein the storage latch is accessed utilizing the first access circuit and the second access circuit.