发明名称 Polishing process for integrated circuit chips
摘要 The control process involves calculation of equivalent thickness equal to the product of primary surface density (Dsp) and height (Hi) from the basic surface (10) of embedded metallic pattern (11). Attack velocity (V) is determined from removed thickness and polishing time for a reference chip, a calculation of polishing time from the equivalent thickness and the velocity, and control of process by obtained time or a function of it. The process may include a calculation of equivalent thickness complemented by a predetermined value, a calculation of the polishing time and the total equivalent thickness and velocity, and the control of process by the corrected polishing time or a function of it. The control of polishing process may include a measuring of remaining thickness, a subtraction of desired thickness to obtain a correction, a calculation of total equivalent thickness and the corrected polishing time. The process may also include a determination of secondary surface density (Dss), a calculation of the thickness correction and the total equivalent thickness, and a calculation of polishing time. The complemented thickness (Hs) may be obtained by measuring the recovered material (12) and subtracting the height of pattern (Hi) and the desired thickness (Ho), or by measuring the recovered material thickness (Hd) and subtracting the height of pattern (Hi).
申请公布号 FR2780552(A1) 申请公布日期 1999.12.31
申请号 FR19980008152 申请日期 1998.06.26
申请人 STMICROELECTRONICS SA 发明人 PERRIN EMMANUEL;ROBERT FREDERIC;BANVILLET HENRI;LIAUZU LUC
分类号 B24B37/04;B24B49/03;H01L21/3105;H01L21/321;H01L21/66;(IPC1-7):H01L21/66;H01L21/304 主分类号 B24B37/04
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