发明名称 |
Single ended dual port memory cell |
摘要 |
A single ended dual port memory cell is described. A bit of data received from one of the first and second ports can be stored. Each of the first and second ports can simultaneously detect the stored bit. A method of reading the contents of a dual port memory cell which has a Beta Ratio less than 1.5 is also described. A wordline is associated with a selected port of the memory cell. The wordline is coupled to a gate device of the memory cell for controlling communication between the memory cell and a bitline. The gate device has a first conductance at a first wordline voltage and a second conductance at a second wordline voltage. The second conductance is less than the first conductance. A port of the cell is selected by applying a select voltage to the associated wordline. The select voltage is approximately the same as the second wordline voltage. The cell contents are then retrieved from the bitline.
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申请公布号 |
US6005795(A) |
申请公布日期 |
1999.12.21 |
申请号 |
US19970789299 |
申请日期 |
1997.01.30 |
申请人 |
CYPRESS SEMICONDUTOR CORPORATION |
发明人 |
HAWKINS, ANDREW L.;SYWYK, STEFAN P. |
分类号 |
H01L27/10;G11C8/16;(IPC1-7):G11C11/00 |
主分类号 |
H01L27/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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