发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE WITH MULTILAYER INTERCONNECTION
摘要 PROBLEM TO BE SOLVED: To provide a manufacturing method for a semiconductor device, with multilayer interconnections, in which the multilayer interconnections can be connected surely even when their misalignment is generated in the formation of a via hole. SOLUTION: In a manufacturing method for a semiconductor device with a multilayer interconnection, a process in which a highly-etching-resistant nitride film 105 is formed on an inter-laminated-interconnection-layer insulating film 104 is executed, and a process in which a via hole is formed between upper-layer laminated interconnections is executed. Then, the penetration of the via hole into a lower-layer laminated interconnection due to their misalignment in the formation of the via hole is prevented by the nitride film 105.
申请公布号 JPH11340324(A) 申请公布日期 1999.12.10
申请号 JP19980144039 申请日期 1998.05.26
申请人 OKI ELECTRIC IND CO LTD 发明人 YAMAMOTO SUKEHIRO
分类号 H05K3/46;H01L21/768;H01L23/12;H01L23/522;(IPC1-7):H01L21/768 主分类号 H05K3/46
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