| 摘要 |
<p>PROBLEM TO BE SOLVED: To accelerate the input/output speed of data with the outside, to improve the degree of parallelism in the arithmetic processing of data and to reduce the number of instructions to be supplied from the outside. SOLUTION: A data input/output circuit 9 is provided for permitting the input/output of data for plural data units with respect to a row or column memory circuit 3 which can transfer data in the unit of a row or column, and to an orthogonal memory 1 for recording image data or the like. Inside an LSI, data are transferred in the unit of a row or column and the input/output with the outside is parallelly performed in plural data units. Further, the instruction applied from the outside is defined as a macro instruction, a translation memory 15 for macro instruction and nano instruction is provided inside the LSI, a lot of correspondent nano instructions are read out of that memory, and processing required for plural computing elements inside a row arithmetic circuit is parallelly performed. The number of plural computing elements in a row or column arithmetic circuit 5 is increased while reducing the scale for improving the degree of parallelism and while utilizing the macro/nano translation memory 15, on the other hand, improvement is dealt with by generating plural nano instructions inside.</p> |
