| 摘要 |
PCT No. PCT/DE96/01174 Sec. 371 Date Jan. 12, 1998 Sec. 102(e) Date Jan. 12, 1998 PCT Filed Jul. 2, 1996 PCT Pub. No. WO97/04480 PCT Pub. Date Feb. 6, 1997In the manufacture of an MOS transistor in a substrate (1), source/drain zones (9) and a doped gate electrode (10) are simultaneously formed by drive-out from a doped layer (8). The dopant distribution in the source/drain zones (9) is set by a permeable diffusion barrier (7) at the surface of the source/drain zones (9). Over and above this, a dopant barrier (3'0 can be provided that prevents dopant from the gate electrode (10) from proceeding into the semiconductor substrate (1).
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