| 摘要 |
When refresh of a memory bank having a plurality of array banks is instructed, a refresh control circuit carries out the refresh by saving a row address latched in a row address latch circuit and a bank activation signal supplied to a bank drive unit respectively in a row address saving circuit and a bank activating information saving circuit. After the refresh completes, each array bank is returned to its original state before the refresh instruction is supplied, according to the saved row address and bank activate information. Accordingly, a synchronous semiconductor memory device in which the penalty at the time of the refresh is reduced is provided.
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