发明名称 |
Digital programmable clock generator |
摘要 |
<p>A programmable clock circuit (50) generates a plurality of phase clock signals (250,260,270) in correspondence with an associated control word (80) programmed into a memory (130). The programmable clock circuit is implemented digitally in an application specific integrated circuit. Each phase clock signal is synchronized by a master clock signal (240) which reduces signal jitter and improves phase signal accuracy. <IMAGE></p> |
申请公布号 |
EP0961408(A1) |
申请公布日期 |
1999.12.01 |
申请号 |
EP19990304112 |
申请日期 |
1999.05.27 |
申请人 |
GENERAL ELECTRIC COMPANY |
发明人 |
WODNICKI, ROBERT GIDEON;HARRISON, DANIEL DAVID;FRANK, PAUL ANDREW;MCGRATH, DONALD THOMAS |
分类号 |
G06F1/04;G06F1/06;G06F1/08;H03K5/15;(IPC1-7):H03K5/15 |
主分类号 |
G06F1/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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