DRIVE CIRCUIT FOR NON-VOLATILE FERROELECTRIC MEMORY DEVICE

摘要

PROBLEM TO BE SOLVED: To make the bit line voltage by a reference cell and main cell constant and to improve operation characteristics by forming a reference cell block consisting of a reference bit line and the reference cell on one side of a main block and selectively connecting the bit line to bit line input/output nodes in accordance with a control signal. SOLUTION: When a word line/plate line drive section 77 impresses a high signal on the word line and plate line, the data stored in the main cell is transmitted through the bit lines B- n, B- n+1, b- N+2, B- n+3 to the bit line input/ output node of a first sense amplifier block 74. The data stored in the reference cell 72 is transmitted through the reference bit line RB0 to the reference bit line input/output nodes R1 to R4 of the first sense amplifier block 74. The first sense amplifier block 74 thereafter amplifies the microvoltage transmitted to the bit line input/output nodes.