发明名称 SEMICONDUCTOR MEMORY AND REGULATOR
摘要 <p>PROBLEM TO BE SOLVED: To achieve a nonvolatile memory device capable of easily rewriting a latch data even with a small current of a memory cell, and operating stable program verification. SOLUTION: A stable program verification operation is achieved by arranging a latch for storing a program data in a column latch for programming of a memory cell and program verification, a circuit for detecting a potential of a bit line, and a latch data resetting circuit, and constituting the device to rewrite the latch data by detecting a decrease in the potential of the bit line and activating the latch reset circuit.</p>
申请公布号 JPH11328981(A) 申请公布日期 1999.11.30
申请号 JP19980129283 申请日期 1998.05.12
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KATAOKA TOMONORI;NISHIDA YOICHI;KIMURA TOMOO;FUCHIGAMI IKUO;MICHIYAMA JIYUNJI
分类号 G11C16/02;G11C16/06;G11C16/10;G11C16/34;(IPC1-7):G11C16/02 主分类号 G11C16/02
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