Laminated chip varistor and production method thereof

摘要

A laminated chip varistor has a varistor element including at least one varistor layer and at least two inner electrodes which are laminated alternatively, and outer most layers comprising the same material as the varistor layer; and terminal electrodes electrically connected to the inner electrodes each formed at each of the both edge portions of the varistor element; wherein a surface roughness (R) of the varistor element is in the range of 0.60 to 0.90 mu m.