| 摘要 |
The case where a memory cell array comprises 1st, 2nd, . . . 2n-th sub-arrays is considered. In this case, when the refresh mode is started, a refresh counter produces an n-bit sub-array selection address signal for selecting the 1st, 2nd, . . . 2n-th sub-arrays one by one in order and a row address signal for selecting a plurality of rows in each sub-array one by one in order. In case a defective row including a retention-defective memory cell exists in the m-th (wherein m stands for 1, 2, . . . or 2n) sub-array, the conversion of the sub-array selection address signal is performed and such a new sub-array selection address signal as to select the m-th sub-array and the k-th sub-array at the same time is produced when the sub-array selection address signal has selected the k-th (wherein k stands for 1, 2, . . . or 2n, and k NOTEQUAL m) sub-array and the row address signal has become the same as the row address signal for selecting the defective row.
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