发明名称 Method of fabricating an unlanded metal via of multi-level interconnection
摘要 A method of fabricating an unlanded metal via of multi-level interconnection. The method is characterized by utilizing damascene scheme to form a metal wiring layer so that the processes are simplified. Moreover, by this method of the invention, a problem of difficulty in filling dielectric material between the metal wiring lines can be avoided and the metal layer does not have to be etched prior to filling the dielectric material. Further more, an etching stop layer is formed over the first inter-metal dielectric layer to avoid overetching during the formation of metal via, which therefore avoid short circuit. Forming the metal wiring lines by damascene scheme allows the etching stop layer to be easily formed over the first dielectric layer, without over etching the metal via.
申请公布号 US5981395(A) 申请公布日期 1999.11.09
申请号 US19970994157 申请日期 1997.12.19
申请人 UNITED MICROELECTRONICS CORP. 发明人 HUANG, YIMIN;YEW, TRI-RUNG
分类号 H01L21/768;(IPC1-7):H01L21/302 主分类号 H01L21/768
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