发明名称 Method of interprocessor data transfer using a network, virtual addresses and paging, a buffer, flags, data transfer status information and user accessible storage areas in main memory
摘要 To realize interprocessor data transfer with the data receive area not fixed in the real memory and with less overhead for synchronization, the send node sends to the destination node, data, a virtual address of a receive area, an address of a receive control flag, a comparison value, and a comparison method. Network adaptor in the destination node judges whether the transfer condition is fulfilled, based on the comparison value, the comparison method and the semaphore in the receive control flag designated by the receive control flag address. Network adaptor further detects whether the receive area of the virtual address is in the main storage, based on the virtual address and the address translation table. The send data is stored in the receive buffer provided in the area for OS, when the above-mentioned condition is not fulfilled or the receive area is not in the main storage. Either when the destination node program issues a specific system call or when the program issues a reading instruction to the data in the receive area and a page fault is generated, OS moves the send data from the receive buffer to the receive area.
申请公布号 US5978894(A) 申请公布日期 1999.11.02
申请号 US19960757997 申请日期 1996.11.27
申请人 HITACHI, LTD. 发明人 SUKEGAWA, NAONOBU;ITO, MASANAO;TAMAKI, YOSHIKO
分类号 G06F12/00;(IPC1-7):G06F12/00 主分类号 G06F12/00
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