| 摘要 |
An integrated circuit including an adder that is a series of one-bit cascaded adder cells. The circuits that implement the adder cells are not all alike. The adder cells are of two types: an even adder cell and an odd adder cell. The even adder cells receive all inputs as noninverted inputs, provide as outputs a noninverted sum bit output and the inverse of the carry-out bit. The odd adder cells receive as inputs the inverse of the carry-in bit, all other inputs are noninverted, and provides as outputs a noninverted sum bit and a noninverted carry-out bit.
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