SEMICONDUCTOR STORAGE DEVICE

摘要

PROBLEM TO BE SOLVED: To prevent the increase of a layout area and suppress the increase of power consumption, by arranging an X decoder and a select gate decoder on the same side to a memory array. SOLUTION: An X decoder XD is arranged on the same side of each memory cell block BLK of a memory array MA, and a select gate decoder SD is arranged on the outer side of the X decoder XD. A source line SL and the drive circuit of a well power supply line WELL are also arranged in the select gate decoder SD on the same side. The select gate line SG is passed between the X decoders XD at a region with no regularity of the X decoder D by the select gate. The source line SL and the well power supply line WELL are passed between the X decoders XD at a region with no regularity of the X decoder XD by separation of the memory cell block BLK. Therefore, power supply wiring and signal wiring between the decoders are eliminated and the chip size can be reduced.