发明名称 |
METHODS AND APPARATUS FOR PERFORMING FAST DIVISION OPERATIONS IN BIT-SERIAL PROCESSORS |
摘要 |
Methods and apparatus for quickly dividing multiple-bit operands using bit-serial processors include strategies for eliminating the number of steps required to execute conventional division operations. According to an exemplary embodiment, a conditional subtraction step, based on a quotient bit computed during a given pass, is combined with a compare step which is used to compute a next quotient bit and which, according to conventional techniques, is ordinarily computed during a subsequent pass. Additionally, exemplary embodiments provide a zero/non-zero mask for denominator bits which extend beyond current most signficant remainder bit during a given pass. As a result, not all denominator bits need be considered during every pass. Advantageously, the methods and apparatus of the invention can provide approximately a 3 to 1 speed improvement as compared to conventional techniques. |
申请公布号 |
WO9953416(A2) |
申请公布日期 |
1999.10.21 |
申请号 |
WO1999US04300 |
申请日期 |
1999.04.09 |
申请人 |
LOCKHEED MARTIN CORPORATION |
发明人 |
MEEKER, WOODROW, L.;VAN DYKE-LEWIS, MICHELE, D. |
分类号 |
G06F7/02;G06F7/52;G06F7/535 |
主分类号 |
G06F7/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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