A CMOS INTEGRATED CIRCUIT HAVING PMOS AND NMOS DEVICES WITH DIFFERENT GATE DIELECTRIC LAYERS

摘要

A CMOS integrated circuit (200) having a PMOS (250) and NMOS (210) device with different gate dielectric layers. According to the present invention, an NMOS transistor (210) is formed on a p-type conductivity region (212) of a semiconductor substrate (202). The NMOS transistor (210) has first gate dieletric layer (220) formed on the p-type conductivity region. A PMOS transistor (250) is formed on a n-type conductivity region (252) of the semiconductor substrate (202). The PMOS transistor (250) has a second gate dielectric layer (260) wherein the second gate dielectric layer (260) has a different composition than the first gate dielectric layer (220).