发明名称 Asynchronous/synchronous digital gain control loop in a sampled amplitude read channel
摘要 A sampled amplitude read channel is disclosed for reading data recorded on a disk storage medium by detecting an estimated binary sequence from a sequence of discrete-time sample values generated by sampling pulses in an analog read signal from a read head positioned over the disk storage medium. The read channel comprises a variable gain amplifier for adjusting the magnitude of the analog read signal before sampling, and a discrete-time gain control loop for generating a gain control signal applied to the VGA in response to the discrete-time sample values. The discrete-time sample values may, or may not be, synchronized to a baud rate of the recorded data. For example, when reading the user data the discrete-time sample values are synchronous, and when reading a servo address mark (SAM) the sample values are asynchronous. As such, the discrete-time gain control loop of the present invention is programmable to operate in a synchronous or asynchronous mode. In asynchronous mode, the gain error is computed in a manner that is less sensitive to amplitude fluctuations over long blocks of data. This is accomplished by computing the gain error as the difference between a predetermined set point and the maximum absolute sample value over a programmable block length.
申请公布号 US5966258(A) 申请公布日期 1999.10.12
申请号 US19970859980 申请日期 1997.05.21
申请人 CIRRUS LOGIC, INC. 发明人 BLISS, WILLIAM G.
分类号 G11B5/012;G11B5/09;G11B5/55;G11B5/58;G11B5/596;G11B19/28;G11B20/10;G11B20/12;G11B20/14;(IPC1-7):G11B5/09 主分类号 G11B5/012
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