发明名称 |
ROW DECODER OF FLASH MEMORY DEVICE |
摘要 |
<p>PROBLEM TO BE SOLVED: To obtain a row decoder of a flash memory device for realizing high integration density and shortening pumping time of positive or negative high potential. SOLUTION: This device comprises many global row decoders for generating a first control signal (GWLP) and a second control signal (GWLN) and many local decoders for selecting a word line selection signal responding to the first and second control signals. Each global row decoder responds to the first address (XAPREDk) from a predecoder to output a first voltage level (VPPGX) corresponding to the first control signal from a first power supply end and also responds to the second control signal (XBOPREDm) from a predecoder to output a second voltage level (VEEGX) corresponding to the second control signal from a second power supply end, and each local row decoder outputs a third voltage level (VEEXy) from a third power supply end generates a fourth voltage level from a fourth power supply end to receive an input of the second address (XCPREDn) from a predecoder.</p> |
申请公布号 |
JPH11273377(A) |
申请公布日期 |
1999.10.08 |
申请号 |
JP19980374860 |
申请日期 |
1998.12.28 |
申请人 |
HYUNDAI ELECTRONICS IND CO LTD |
发明人 |
KA JINCHORU |
分类号 |
G11C16/06;G11C8/10;(IPC1-7):G11C16/06 |
主分类号 |
G11C16/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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