发明名称 |
Electrically programmable memory cell arrangement and method for its manufacture |
摘要 |
An electrically programmable memory cell arrangement has a plurality of individual memory cells that respectively has an MOS transistor with a gate dielectric with traps, and which are arranged in rows that run in parallel. Adjacent rows thereby respectively run in alternating fashion on the bottom of the longitudinal trenches (5) and between adjacent longitudinal trenches (5) and are insulated against one another. The memory cell arrangement can be manufactured by means of self-adjusting process steps with a surface requirement per memory cell of 2 F2 (F: minimum structural size).
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申请公布号 |
US5959328(A) |
申请公布日期 |
1999.09.28 |
申请号 |
US19970779446 |
申请日期 |
1997.01.07 |
申请人 |
SIEMENS AKTIENGESELLSCHAFT |
发明人 |
KRAUTSCHNEIDER, WOLFGANG;RISCH, LOTHAR;HOFMANN, FRANZ;REISINGER, HANS |
分类号 |
H01L21/8247;H01L21/8246;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L29/76 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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