发明名称 |
METHOD FOR REDUCING DIFFUSION DISCHARGE IN INTEGRATED CIRCUIT AND CAPACITOR DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To reduce the diffusion discharge of contaminant and the diffusion of silicon in a piled capacitor, by forming a first oxide layer on a silicon plug, nitrating the first oxide layer, and etching the nitrated first oxide layer for forming a first barrier film. SOLUTION: A polysilicon plug 210 is formed of the various layers of polysilicon which is doped or not doped. A barrier layer 222 is formed on the polysilicon plug 210. Silicon dioxide layers 212 are arranged around the polysilicon plug 210. A base electrode 216 is arranged on the polysilicon plug 210. An adhesion layer 214 partially covers the silicon dioxide layers 212. Thus, the diffusion of dopant can be reduced. |
申请公布号 |
JPH11261031(A) |
申请公布日期 |
1999.09.24 |
申请号 |
JP19980359305 |
申请日期 |
1998.12.17 |
申请人 |
SIEMENS AG;INTERNATL BUSINESS MACH CORP <IBM> |
发明人 |
DEHM CHRISTINE;LOH STEPHEN K;MAZURE CARLOS |
分类号 |
H01L27/04;H01L21/02;H01L21/822;H01L21/8242;H01L27/108 |
主分类号 |
H01L27/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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