Method and device to simulate interruptions for the emulation of a processor

摘要

A computer system comprising a microprocessor on a single integrated circuit chip connected to an external computer device and at least one other device; the integrated circuit chip having: an on-chip CPU with a plurality of registers; a communication bus for providing a parallel communication path between the CPU and a first memory local to the CPU; and an external communication port connected to the communication bus, the port having an internal connection to the bus of an internal parallel signal format and an external connection to the external computer device of an external format less parallel than the said internal format, the port forming part of the memory address space of the CPU from which instructions may be fetched, whereby: the port may be addressed by execution of an instruction by the CPU; and the external computer device may send to the integrated circuit chip an interrupt signal simulating an interrupt signal from the other device. <IMAGE>