发明名称 Bi-phase code decoding system
摘要 A horizontal period counter 3 determines one bit period of bi-phase codes by measuring the period of a horizontal scan line immediately preceding one containing bi-phase codes to be decoded. An edge pulse generator 6 generates edge pulses at rising and falling edges of inputted bi-phase codes. A compensating pulse generator 7 is triggered by the edge pulse and generates a compensating pulse in a predetermined period, which is shorter than one bit period of the bi-phase codes and longer than one half bit period, according to one bit period that has been determined. A rise judging circuit 11 generates sampling pulses by superimposing compensating pulses on the edge pulses. The bi-phase codes are decoded according to the sampling pulses.
申请公布号 US5953063(A) 申请公布日期 1999.09.14
申请号 US19970859175 申请日期 1997.05.20
申请人 NEC CORPORATION 发明人 HIDAKA, KENJI
分类号 H04N9/00;G11B20/14;H03K9/06;H03M5/12;H03M7/00;H04L25/49;(IPC1-7):H04N7/24 主分类号 H04N9/00
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