发明名称 Method and circuit for reducing power and/or current consumption
摘要 A semiconductor device (e.g., a zero-delay buffer) is provided which is capable of reducing current or power consumption without the use of a dedicated pin. The device may include a frequency detector that receives a detector input signal corresponding to or derived from a device input signal. The device input signal performs a first function during normal operation of the device. The detector determines whether the frequency of the detector input signal is less than a predetermined minimum, and if so, generates a power down signal configured to direct the device to reduce current or power consumption in at least one of its component circuits. The frequency detector may include a "one-shot" circuit responsive to the detector input signal for generating a frequency indicator signal, and a "power down" signal output circuit responsive to the frequency indicator signal for generating the power down signal.
申请公布号 US5949261(A) 申请公布日期 1999.09.07
申请号 US19960767767 申请日期 1996.12.17
申请人 CYPRESS SEMICONDUCTOR CORP. 发明人 FIELD, DEAN L.;HINTON, LARRY LYNN;KIZZIAR, III, JOHN
分类号 H03L3/00;(IPC1-7):H03L7/06 主分类号 H03L3/00
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