Integrated circuit layout complete with a bus logic unit connected to a data bus with power reduction circuitry

摘要

An integrated circuit layout complete with a bus logic unit connected to a data bus. The data bus includes at least one activation line for an activation signal, making it possible-via the data bus-to activate the bus logic unit for data transmission. A controllable power supply unit is provided with a control input connected to the activation line and serves to feed an operating current to the bus logic unit. The operating current is reduced by the activation signal when the bus logic unit is deactivated.