发明名称 BRIDGE BETWEEN TWO BUSES OF A COMPUTER SYSTEM THAT LATCHES SIGNALS FROM THE BUS FOR USE ON THE BRIDGE AND RESPONDS ACCORDING TO THE BUS PROTOCOLS
摘要 A computer system having an ISA bus and a PCI bus is provided with a PCI to ISA bridge having certain imbedded functions performed by PCI slaves on the bridge. In order to implement the bridge in slow CMOS technology, the PCI control signals are latched on the bridge. Since the PCI slaves on the bridge cannot respond with control signals on the PCI bus fast enough to satisfy the PCI bus protocol due to this latching, a logic device is provided on the bridge. The logic device monitors the unlatched master-slave control signals carried on the PCI bus, and in appropriate situations, drives the control signals on the PCI bus (within the time specified by the PCI bus protocol) that the PCI slaves would normally drive but are unable to within the time necessary to meet the PCI bus protocol.
申请公布号 CA2162187(C) 申请公布日期 1999.08.24
申请号 CA19952162187 申请日期 1995.11.06
申请人 发明人 KATZ, SAGI;WALL, WILLIAM ALAN;KULIK, AMY;CRONIN, DANIEL R., III
分类号 G06F13/36;G06F13/40;G06F13/42;(IPC1-7):G06F13/14 主分类号 G06F13/36
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