发明名称 MICROPROCESSOR COMPRISING A SYNCHRONISING SYSTEM WITH AN EXPECTED ASYNCHRONOUS EVENT
摘要 The invention concerns a microprocessor (10) comprising a timer (TMR) for measuring the time interval based on a set counting value (VAL) and a counting clock signal(H2). The invention is characterised in that it comprises wired logic means (EVTDET) for detecting at least an expected event (E1, E2, E3), arranged for immediately applying to said timer a loading signal (LOAD) of a set counting value (VAL1, VAL2) when the expected event occurs. The invention is applicable to the management of high rate asynchronous data transmission in contactless chip cards.
申请公布号 WO9941660(A1) 申请公布日期 1999.08.19
申请号 WO1999FR00145 申请日期 1999.01.26
申请人 INSIDE TECHNOLOGIES;CHARRAT, BRUNO 发明人 CHARRAT, BRUNO
分类号 G06F9/40;(IPC1-7):G06F9/40 主分类号 G06F9/40
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