| 摘要 |
A power IC having an SOI structure including at least a supporting substrate as a bottom layer, a substrate insulating film, an SOI conductive film, an SOI insulating film, and an Si film. The Si film serving as a top layer of the SOI structure is divided into a plurality of active layers by element isolation dielectric regions, and a desired semiconductor element is formed in each active layer. A total capacitance between each active layer and the supporting substrate is small and an inversion layer formed at a bottom of the active layer in the conventional SOI substrate is prevented from being induced. The power IC is constituted at least by an element A in a first active layer and an element B in a second active layer operating in association with the element A. The first active layer is electrically connected to the SOI conductive film just under the first and second active layers. A potential difference is prevented from being applied to the second active layer of the element B upon operation of the element A. With this arrangement, even if an operating voltage of the power IC is raised, independent operation of each element is retained. Furthermore, a low on-resistance of an output stage power-element is realized, and the device characteristics such as high speed operation and high conversion efficiency are provided.
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