| 摘要 |
An input signal variation detection circuit effectively detects transitions of input signals from a memory apparatus. The circuit includes a plurality of unit blocks for detecting transitions of input signals and for outputting transition detection signals corresponding to the transition direction, e.g., from high to low level or from low to high level, a first transistor having a drain coupled for receiving a transition detection signal from the unit blocks, a gate coupled for receiving a first prescribed voltage, and a source coupled for receiving a second prescribed voltage, and an OR-gate for ORing a transition detection signal from the unit blocks and outputting a summation signal.
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