发明名称 |
Shared data lines for memory write and memory test operations |
摘要 |
The present invention is embodied in a method and apparatus which permits the testing of a memory device by utilizing normally unused data write lines to conduct the results of the memory test operations to a memory controller or processor. The data read from a specific memory cell is input into a comparator through a data sense amplifier and compared to the data from another memory cell. When the data is not coincident, a switch is enabled causing a data write line to change states. The change of state of the data write line disables a buffer, causing it to output a tri-state signal. A controller detects and interprets the tri-state signal output from the buffer as improper memory functioning. |
申请公布号 |
US5936901(A) |
申请公布日期 |
1999.08.10 |
申请号 |
US19980044166 |
申请日期 |
1998.03.19 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
WONG, VICTOR;INGALLS, CHARLES L.;WRIGHT, JEFFREY P.;COWLES, TIMOTHY B. |
分类号 |
G11C29/12;G11C29/38;(IPC1-7):G11C7/00 |
主分类号 |
G11C29/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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