| 摘要 |
<p>PROBLEM TO BE SOLVED: To obtain an interconnection system which performs serial-parallel signal conversion by performing parallel-serial signal conversion, without increasing the transmission capacity at a sending side and establishing frame synchronization based on the data at a receiving side. SOLUTION: A parallel-serial signal converting means 54 converts an arbitrary parallel number of data and a signal from a C-bit generating means 52 into a serial signal, based on a multiplexed clock that is synchronized with a clock in a device. The means 52 makes parallel data an input and outputs the inverted data of the input data, when a frame pulse is insignificant and an interconnection frame generating means 50 outputs non-inverted data when a frame pulse is significant. A synchronous establishing means 56 detects word synchronization and frame phase of a serial signal. A parallel-serial signal converting means 57 terminates arbitrary parallel data and a frame pulse, based on a word identification pulse and a frame phase indicative pulse from the means 56.</p> |
