发明名称 Computation apparatus and method
摘要 A computation apparatus such as a Fast Fourier Transform (FFT) apparatus which processes ordered sets of data in a computation unit (4, 24) operating according to a high-speed clock includes an input buffer (1, 21) arranged to accept data in synchronism with a relatively low-speed clock, and an output buffer (6, 26) arranged to discharge the data in synchronism with the low-speed clock. The apparatus includes an internal memory (3, 23) as well as means such as selectors (2, 22) and (5, 25) for transferring data in synchronism with the high-speed clock from the input buffer to the computation unit or the memory; between the computation unit and the memory; and from the computation unit or the memory to the output buffer. The transferring means is arranged to reorder the data, preferably in reverse-digit sequence, during transfer from the input buffer or during transfer to the output buffer. This avoids the need for a separate reordering memory at the input end or output end of the device. <IMAGE>
申请公布号 EP0827087(A3) 申请公布日期 1999.08.04
申请号 EP19970305908 申请日期 1997.08.04
申请人 SONY CORPORATION 发明人 KOZAKI, YASUNARI;ITO, OSAMU;IKEDA, YASUNARI
分类号 G06F7/00;G06F17/14 主分类号 G06F7/00
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