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发明名称
PARALLEL BIT TEST CONTROL CIRCUIT FOR SYNCHRONOUS DRAM AND CONTROL METHOD THEREOF
摘要
申请公布号
KR100213216(B1)
申请公布日期
1999.08.02
申请号
KR19960042238
申请日期
1996.09.24
申请人
SAMSUNG ELECTRONICS CO, LTD.
发明人
JANG, TAE-SUNG;JUNG, SE-JIN
分类号
G11C11/408;(IPC1-7):G11C11/408
主分类号
G11C11/408
代理机构
代理人
主权项
地址
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