发明名称 METHOD AND APPARATUS FOR ENFORCING ORDERED EXECUTION OF READS AND WRITES ACROSS A MEMORY INTERFACE
摘要 <p>A memory interface is provided between a processor and a memory subsystem which is capable of multiple concurrent transactions or accesses. The interface between the processor and the memory carries read and write operations as well as 'barrier' operations, where a barrier operation signals the non-reorderability of operations. In one variation, the memory interface is an interface to one or more memory mapped input/output (I/O) devices or computational devices.</p>
申请公布号 WO1999038085(A1) 申请公布日期 1999.07.29
申请号 US1999001387 申请日期 1999.01.21
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