发明名称 METHOD AND APPARATUS FOR HANDLING MULTIPLE LEVEL-TRIGGERED AND EDGE-TRIGGERED INTERRUPTS
摘要 Determining whether the highest priority pending interrupt is an active level-triggered interrupt. One embodiment of the present invention includes an interrupt service register (220) operable to indicate when an interrupt is being serviced, an interrupt request register (218) operable to indicate when an interrupt is pending, and a comparator (228) operable to compare the vector corresponding to the highest priority pending interrupt with the vector associated with the particular interrupt input. Included also is a control generator (230) coupled to the comparator and operable to selectively clear and/or set bits contained in the interrupt service register (220) and the interrupt request register (218). The present invention supports both edge-triggered and level-triggered interrupts without the need for a trigger mode register or other similar overhead housekeeping controls and related storage logic and without any handshake requirements.
申请公布号 WO9938074(A1) 申请公布日期 1999.07.29
申请号 WO1999US01162 申请日期 1999.01.18
申请人 INTEL CORPORATION 发明人 JAYAKUMAR, MUTHURAJAN;GORU, VIJAY, KUMAR
分类号 G06F9/48;(IPC1-7):G06F9/46 主分类号 G06F9/48
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